Pinned Repositories
coreblocks
RISC-V out-of-order core for education and research purposes
llvm-project-pcpu
LLVM port for PCPU
pcpu
pcpu - cpu with custom architecture written in Verilog
pcsn
PCpu (s)Emulator New
piOS
Operating system for pcpu
ppcpu
Pipelined PCPU
ppcpu_caravel
ppcpu for openMPW
rest2api
Lightweight Java server for REST APIs
sondechaser
RadioSonde tracking app
vscode-discord-rich-presence
Discord Rich Presence extension for VSCode
piotro888's Repositories
piotro888/vscode-discord-rich-presence
Discord Rich Presence extension for VSCode
piotro888/piOS
Operating system for pcpu
piotro888/ppcpu
Pipelined PCPU
piotro888/sondechaser
RadioSonde tracking app
piotro888/pcpu
pcpu - cpu with custom architecture written in Verilog
piotro888/pcsn
PCpu (s)Emulator New
piotro888/ppcpu_caravel
ppcpu for openMPW
piotro888/llvm-project-pcpu
LLVM port for PCPU
piotro888/oic
Checker scripts for competitive programming
piotro888/hydraulik
FPGA network circuit generator (WIP)
piotro888/rest2api
Lightweight Java server for REST APIs
piotro888/APlusGameDev
piotro888/coreblocks
RISC-V out-of-order core for education and research purposes
piotro888/ksi_projekt_drzwi_otwarte
piotro888/litex
Build your hardware, easily!
piotro888/OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
piotro888/pcpu-toolchain
All tools needed for pcpu dev with install script
piotro888/riscv-isa-manual
RISC-V Instruction Set Manual
piotro888/stdlib2
piotro888/transactron
Hardware transactions library for Amaranth
piotro888/waybar
Highly customizable Wayland bar for Sway and Wlroots based compositors. :v: :tada:
piotro888/zosiatime
timer for ZOSIA conference