This project uses Python3 to obfuscate VHDL files. It is fast and easy to use. You must specify the source location of the VHDL files along with the path of the output files
- Generating Random Name for
SIGNAL
,CONSTANT
,VARIABLE
,GENERIC
Parameters andinput/output
ports - All obfuscation names have 30 characters in length and consist of alphabets and numbers
- Removing all comments in
.vhd
files - Selection of all
.vhd
files between other file formats in all subdirectories automatically. - Copy source structure in destination and generate obfuscation files into them.
- This is very fast and you can see the progress of the obfuscation process.
- both original and obfuscation names of parameters save into
dump.txt
file together. you can use it as a reference.
1.Clone this repository or download it from the release page
2.install Python3 in your environment (windows, Linux or Mac)
3.Open cmd
in Windows or terminal
in Linux or Mac.
4.cd
to the directory of downloaded files.
5.type py VHDL_Obfuscator_Tool.py YOUR_SRC_FOLDER_PATH YOUR_DIST_FOLDER_PATH
Note: Don't worry about your original files, this app never overwrites them.
- Must use
entity.work
for declaration of ipcores instead of using component - Don't use the same signal name as ipcores ports in all VHDL files
- May need to modify some files in conflict by ipcores or Verilog files
if you enjoy it or wanna help the author for more open-source projects, give it a ⭐️ and you can support them from here.
- BTC:
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- ETH:
0xB9E09Ff8757C4233371C9Bf5109E528dAd9daE19
- TRX:
TRAzJXsMbtF63Gqr2opSP6hnssMJnrJZs5
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rKE8XHE6GKHXzfC9qMERXXBvfcZU6RLVK5
- DOGE:
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if you live in Iran 🇮🇷, can use the link below:
if you have any suggestions and ideas or fixing bugs, please feel free to connect with me: farrokhi.pourya@gmail.com
- Thanks to pcineverdies for writing this code based on his repository.