Philippos Papaphilippou, Myrtle Shah "FPGA-extended General Purpose Computer Architecture" The 18th International Symposium on Applied Reconfigurable Computing (ARC) 2022
This is a research paper exploring a novel FPGA-extended computer architecture, where small FPGAs are used to implement instructions inside general-purpose processors (CPUs). Click here to read the manuscript.
- simodensef: Softcore framework (Simodense (RV32IM) extended with "F" (RV32IMF) (implemented behaviourually) and "Zicsr". This also targets the faster Verilator rather than the more realistic iVerilog for simulation.
- benchmarks: The ported benchmarks (Embench with F) and operating system (FreeRTOS) etc.
- nextpnr-model: The FPGA architecture model (nextpnr experiment)
- pintools-opcode-prof: Intel PIN experiments for opcode characterisation
This is mostly of research nature, thus the paper has important techical information that can help with understanding the framework and reproducing results.
As the experiments are based on other tools, it is easier to become familiar with those first. For the Simodense experiments you can start from the original Simodense repository, which contains tutorials, video etc. For experimenting with the FPGA model see nextpnr.
For any questions, please do not hesitate to contact me.
Philippos Papaphilippou, Myrtle Shah "FPGA-extended General Purpose Computer Architecture" The 18th International Symposium on Applied Reconfigurable Computing (ARC) 2022 pdf link source program slides video bib