Pinned Repositories
AccessNoxim_v0.3
Amazon-Previous-OA-questions
This repositry contains all the Previous year Amazon Online Assessment Tasks
avsddac_3v3
This repository contains the design and simulation process and results of potentiometric digital to analog converter.
avsddac_3v3_sky130_v2
EDA_TOOLS_installer
msvsd32bitsram
VSD Research Program
sky130_pd_workshop_2022
This repository contains all the details for the 5 day sky130 pdk Physical Design workshop (VSDIAT AUG-2022)
tinytapeout_pramit
efabless tiny tapeout with wokwi BCD to 7-Segment
YOLO_INTRUDER_DETECTION_SYSTEM-Part--1
YOLO_INTRUDER_DETECTION_SYSTEM-Part-2-AttendanceCam
2nd part of yolo intruder alert system
pramitpal's Repositories
pramitpal/EDA_TOOLS_installer
pramitpal/msvsd32bitsram
VSD Research Program
pramitpal/sky130_pd_workshop_2022
This repository contains all the details for the 5 day sky130 pdk Physical Design workshop (VSDIAT AUG-2022)
pramitpal/avsddac_3v3_sky130_v2
pramitpal/tinytapeout_pramit
efabless tiny tapeout with wokwi BCD to 7-Segment
pramitpal/avsdspamp_3v3_sky130
pramitpal/depth_estimation1
pramitpal/edaBundle_whyRD
opensource EDA tool flor VLSI design
pramitpal/ESPWebDAV
This is the firmware for FYSETC SD-WIFI module.
pramitpal/HDL-Bits-Solutions
This is a repository containing solutions to the problem statements given in HDL Bits website.
pramitpal/iiitb_freqdiv
This is a frequency divider model
pramitpal/InputCaptureModule
Input Capture module for microcontrollers in Verilog
pramitpal/Learning-about-FPGA-DESIGN-
This repository contains some introductory level review about learning about FPGA Design including some tutorials, links to websites and some blogs related to learning about FPGA & RTL Design
pramitpal/linkedin-skill-assessments-quizzes
Full reference of LinkedIn answers 2022 for skill assessments (aws-lambda, rest-api, javascript, react, git, html, jquery, mongodb, java, Go, python, machine-learning, power-point) linkedin excel test lösungen, linkedin machine learning test LinkedIn test questions and answers
pramitpal/Machine-Learning-Collection
A resource for learning about ML, DL, PyTorch and TensorFlow. Feedback always appreciated :)
pramitpal/OpenLANE-Sky130-Physical-Design-Workshop
Documentation for the 5 day workshop: Advance Physical Design using OpenLANE/Sky130
pramitpal/OpenSource_Physical_Design
This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK
pramitpal/PyTorch-GAN
PyTorch implementations of Generative Adversarial Networks.
pramitpal/Rail2Rail_opamp_sky130
Rail-Rail Opamp using sky130nm PDK
pramitpal/riscduino_dcore
pramitpal/singlePixelImaging
manuscript in latex
pramitpal/sky130-10-bit-SAR-ADC
A 10bit SAR ADC in Sky130
pramitpal/sky130-apd-workshop
The repository contains my results form the VSD Skywater 130 Advanced Physical Design Workshop Aug 2022
pramitpal/sky130_klayout_pdk
Skywaters 130nm Klayout PDK
pramitpal/SPI_dataset_creation
pramitpal/SRGAN_SPI
pramitpal/tinytapeout-4-bit-cpu
A design for TinyTapeout
pramitpal/vsdflow
VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft their ideas in RTL language, and convert the design to hardware using VSD (RTL-to-GDS) FLOW. VSDFLOW is completely build using OPHW tools, where the user gives input RTL in verilog. From here on the VSDFLOW takes control, RTL is synthesized (using Yosys). The synthesized netlist is given to PNR tool (Qflow) and finally Sign-off is done with STA tool (using Opentimer). The output of the flow is GDSII layout and performance & area metrics of your design. VSDFLOW also provide hooks at all stages for users working at different levels of design flow. It is tested for 30k instance count design like ARM Cortex-M0, and can be further tested for multi-million instance count using hierarchical or glue logic.
pramitpal/VSDIAT_workshop
pramitpal/WSL_Setup_guide
Easy and well defined repo to show how to setup WSL in win 10/win 11