premjithav

premjithav's Stars

• lvgl/lv_web_emscripten

  LVGL ported to Emscripten to be converted to JavaScript

  Language:C7026

• erik-larsen/emscripten-sdl2-ogles2

  C++/SDL2/OpenGLES2 samples running in the browser via Emscripten

  Language:JavaScript3310

• renode/renode

  Renode - Antmicro's open source simulation and virtual development framework for complex embedded systems

  Language:RobotFramework1.5k272

• chipsalliance/riscv-dv

  Random instruction generator for RISC-V processor verification

  Language:Python997323

• michaeljclark/rv8

  RISC-V simulator for x86-64

  Language:C++67197

• michaeljclark/riscv-probe

  Simple machine mode program to probe RISC-V control and status registers

  Language:C11628

• lvgl/lvgl

  Embedded graphics library to create beautiful UIs for any MCU, MPU and display type.

  Language:C16.1k3.2k

• riscv-boom/riscv-coremark

  Setup scripts and files needed to compile CoreMark on RISC-V

  Language:C6128

• TheCodingLama/CDAC-Workshop-CyberSecurity

  This repository contains data, codes and presentation files which are used in CDAC Machine and Deep learning workshop conducted by CEN, Amrita.

  Language:Jupyter Notebook42

• naushada/aadhaar_authentication

  Aadhaar Authentication OTP 1.6 and Auth 2.0 support

  Language:Roff11

• janvrany/riscv-debian

  A set of scripts to build a (somewhat) working Debian image for RISC-V.

  339

• timwang1104/3stage_riscv

  Language:VHDL1

• YoeDistro/yoe-distro

  Embedded Linux distribution optimized for product development (based on OE/Yocto)

  Language:BitBake18746

• riscvarchive/riscv-buildroot

  RISC-V Buildroot

  91

• buildroot/buildroot

  Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at https://gitlab.com/buildroot.org/buildroot/. Do not open issues or file pull requests here.

  Language:Makefile2.7k2.4k

• riscvarchive/riscv-linux

  RISC-V Linux Port

  Language:C607205

• LC-John/RISCV-Simulator

  PKU computer organization and architecture RISC-V Simulator LAB

  Language:C++333

• michaeljclark/riscv-meta

  RISC-V Instruction Set Metadata

  3811

• michaeljclark/busybear-linux

  busybear-linux is a tiny RISC-V Linux root filesystem image that targets the VirtIO board in riscv-qemu.

  Language:Shell9233

• jdryg/RISCVEmu

  Toy RISC-V emulator

  Language:C++115

• riscvarchive/riscv-qemu

  QEMU with RISC-V (RV64G, RV32G) Emulation Support

  Language:C385154

• sifive/buildroot

  Buildroot, making embedded Linux easy. Note that this is not the official repository, but only a mirror. The official Git repository is at http://git.buildroot.net/buildroot/. Do not open issues or file pull requests here.

  Language:Makefile1525

• rsnikhil/Forvis_RISCV-ISA-Spec

  Formal specification of RISC-V Instruction Set

  Language:Haskell9619

• riscv/meta-riscv

  OpenEmbedded/Yocto layer for RISC-V Architecture

  Language:BitBake356135

• cesanta/mongoose-os

  Mongoose OS - an IoT Firmware Development Framework. Supported microcontrollers: ESP32, ESP8266, CC3220, CC3200, STM32F4, STM32L4, STM32F7. Amazon AWS IoT, Microsoft Azure, Google IoT Core integrated. Code in C or JavaScript.

  Language:C2.5k427

• riscv-software-src/riscv-angel

  JavaScript RISC-V ISA Simulator. Boots linux in a web-browser.

  Language:JavaScript33260

• torvalds/linux

  Linux kernel source tree

  Language:C178k53.2k