Proteus Core

Proteus is a configurable RISC-V core.

Pinned Repositories

ami
Snapshot of the AMi implementation discussed in our S&P 2024 paper "Architectural Mimicry: Innovative Instructions to Efficiently Address Control-Flow Leakage in Data-Oblivious Programs"
Language:Scala0 2 00
cheritree
Snapshot of the three implementations (in Sail, Proteus and Morello, respectively) discussed in our EuroS&P 2023 paper "CHERI-TrEE: Flexible enclaves on capability machines"
Language:Coq3 2 01
newlib
Board support package for Newlib on Proteus.
Language:C0 1 01
prospect
ProSpeCT: Provably Secure Speculation for the Constant-Time Policy.
Language:C14 3 01
proteus
The SpinalHDL design of the Proteus core, an extensible RISC-V core.
Language:Scala36 2 58

proteus-core/proteus
The SpinalHDL design of the Proteus core, an extensible RISC-V core.
Language:Scala36 2 58
proteus-core/prospect
ProSpeCT: Provably Secure Speculation for the Constant-Time Policy.
Language:C14 3 01
proteus-core/cheritree
Snapshot of the three implementations (in Sail, Proteus and Morello, respectively) discussed in our EuroS&P 2023 paper "CHERI-TrEE: Flexible enclaves on capability machines"
Language:Coq3 2 01
proteus-core/ami
Snapshot of the AMi implementation discussed in our S&P 2024 paper "Architectural Mimicry: Innovative Instructions to Efficiently Address Control-Flow Leakage in Data-Oblivious Programs"
Language:Scala0 2 00
proteus-core/newlib
Board support package for Newlib on Proteus.
Language:C0 1 01