Pinned Repositories
OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
Baremetal-piZero
rki2
RTEMS Kernel Image verson 2
serv
SERV - The SErial RISC-V CPU
circt
Circuit IR Compilers and Tools
bluff
Open for all, learn as you contribute project for building an online multiplayer game of Bluff maintained by BITS ACM.
Historical-Stock-Data
Enter the Ticker, Enter the Dates, BOOM! You get Historical Stock Data for any listing easily from the command line
Basic-Video-Concat
A simple python program to concatenate(merge) videos using MoviePy.
adv-deb-multi
Adversarial debiasing implementation compatible with generic pandas DataFrames and multiclass classification.
bit-tree-sparse
pruhnuhv's Repositories
pruhnuhv/pruhnuhv.github.io
pruhnuhv/bit-tree-sparse
pruhnuhv/half-precision-floats
Half-precision floating point multiply and accumulate
pruhnuhv/Vimrc
My vimrice that makes using NeoVim easier and more fun.
pruhnuhv/sscs-ose-code-a-chip.github.io
IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)
pruhnuhv/OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
pruhnuhv/circt
Circuit IR Compilers and Tools
pruhnuhv/Basic-Video-Concat
A simple python program to concatenate(merge) videos using MoviePy.
pruhnuhv/ThunderGP
HLS-based Graph Processing Framework on FPGAs
pruhnuhv/adv-deb-multi
Adversarial debiasing implementation compatible with generic pandas DataFrames and multiclass classification.
pruhnuhv/rtems
Realtime SMP Kernel, networking, file-systems, drivers, BSPs, samples, and testsuite.
pruhnuhv/rki2
RTEMS Kernel Image verson 2
pruhnuhv/rtems-u-boot
pruhnuhv/Historical-Stock-Data
Enter the Ticker, Enter the Dates, BOOM! You get Historical Stock Data for any listing easily from the command line
pruhnuhv/Baremetal-piZero
pruhnuhv/makerchip_examples
pruhnuhv/serv
SERV - The SErial RISC-V CPU
pruhnuhv/warp-v
WARP-V is an open-source RISC-V CPU core generator written in TL-Verilog.
pruhnuhv/openpiton
The OpenPiton Platform
pruhnuhv/bluff
Open for all, learn as you contribute project for building an online multiplayer game of Bluff maintained by BITS ACM.
pruhnuhv/Twitter-selenium
This is a basic bot which Tweets out a Greeting and Number of unread notifications making use of Selenium on Twitter
pruhnuhv/NOT-Tic-tac-toe
Tic-tac-toe, vanilla Js
pruhnuhv/raspberrypi
Raspberry Pi ARM based bare metal examples
pruhnuhv/rki
Rtems Kernel Image , an example RTEMS application