pwang7

Pinned Repositories

axi-dma
Language:Scala31
blake2b_compress
verilog implementation of blake2b_compress
Language:Verilog10
caravel_user_project
https://caravel-user-project.readthedocs.io
Language:Verilog41
datenlord
Language:Rust1 0 00
Integrated_Circuit_Design_Laboratory_IC_Lab
Integrated Circuit Design Laboratory(IC Lab) at 2019 Fall, NCTU. Final project is a customized 16 bits ISA processor.
Language:Verilog1 1 00
rebook
Language:Python96 8 1412
scripts
Language:Tcl1 1 01
simple-tlb
Language:Tcl1 2 01
spinal-net
Language:Verilog10
VexRiscvPipelineDemo
Language:Scala1 2 01

pwang7's Repositories

pwang7/TRIDENT
A Hardware Implemented Poseidon Hasher
pwang7/bluelib
Miscellaneous components for bluespec
pwang7/SpinalDoc-RTD
The sources of the online SpinalHDL doc
Language:Python
pwang7/fpga_workshop_collaterals
Input files and commands needed for the workshop, sorted daywise
pwang7/rtl
Language:Verilog
pwang7/High-Precision-Congestion-Control
pwang7/proj103-container-virtualization
pwang7/vivado-library
pwang7/Merlinclash
Merlinclash教程
pwang7/rdma-sys
Language:Rust
pwang7/VexRiscvPipelineDemo
Language:Scala11
pwang7/roce-sim
Language:Python
pwang7/ece_4305
Code associated with Cal Poly Pomona's ECE 4305
pwang7/async-rdma
Language:Rust
pwang7/SpinalWorkshop
Labs to learn SpinalHDL
Language:Scala
pwang7/blake2b_compress
verilog implementation of blake2b_compress
Language:Verilog1
pwang7/avsdpll_3v3
This repository contains simulation files and other relevant files on the On-chip clock multiplier (PLL) (Fclkin—5MHz to 12MHz, Fclkout—40MHZ to 100MHZ at 1.8v)IP worked on in the VSD Online Internship.
pwang7/hdl
HDL libraries and projects
pwang7/SpinalTemplateSbt
A basic SpinalHDL project
pwang7/SystemVerilog_Coursework
These are some coursework related to SystemVerilog Design & Verification in a graduate-level course, Integrated_Circuit_Design_Laboratory_IC_Lab, at NCTU.
pwang7/uart-vcs
Language:SystemVerilog
pwang7/Spinal-bootcamp
SpinalHDL-tutorial based on Jupyter Notebook
Language:Jupyter Notebook
pwang7/pwang7.github.io
pwang7/docker-wine-linux
:boom::whale::fire:Linux运行wine应用(QQ/微信/百度网盘/TIM/迅雷极速版/Foxmail等)，适用于所有发行版------- Best wine-QQ/TIM/Wechat for all Linux distros
pwang7/FPGADesignElements
A self-contained online book containing a library of FPGA design modules and related coding/design guides.
Language:HTML
pwang7/open-nic-driver
pwang7/Integrated_Circuit_Design_Laboratory_IC_Lab
Integrated Circuit Design Laboratory(IC Lab) at 2019 Fall, NCTU. Final project is a customized 16 bits ISA processor.
1
pwang7/sky130RTLDesignAndSynthesisWorkshop
pwang7/spinal-net
Language:Verilog1
pwang7/VSDBabySoC
VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.