#part 1
Implementing the following processor shown in the below image
#Part 2
This is the extension of the previous processor. In this part we will implement the circuit depicted in Figure 4, in which a memory module and counter are connected to the processor. The counter is used to read the contents of successive locations in the memory, and this data is provided to the processor as a stream of instructions. To simplify the design and testing of this circuit we have used separate clock signals, PClock and MClock, for the processor and memory.
Note: The design files and complete RTL code is available. You can email me at qullah.bee20seecs@seecs.edu.pk to get access.