qlou

Qiuwen Lou

Pinned Repositories

AccDNN
A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
Language:Verilog00
algo
数据结构和算法必知必会的50个代码实现
Language:Python00
c_code_mnist_inference
Language:Python0 1 00
cc189
00
coding_execrise
This is a simple coding exercise.
Language:Python00
DNN_NeuroSim_V1.0
Language:C++0 1 00
DNN_NeuroSim_V1.1
Language:C++0 1 00
EvaNN
This is a tool for DNN architecture energy modeling
Language:C++00
extremely-low-precision-network-training
Language:Python10
MLP_NeuroSim_V2.0
Language:C++0 1 00

qlou's Repositories

qlou/extremely-low-precision-network-training
Language:Python10
qlou/AccDNN
A compiler from AI model to RTL (Verilog) accelerator in FPGA hardware with auto design space exploration.
Language:Verilog00
qlou/algo
数据结构和算法必知必会的50个代码实现
Language:Python00
qlou/c_code_mnist_inference
Language:Python0 1 00
qlou/cc189
00
qlou/coding_execrise
This is a simple coding exercise.
Language:Python00
qlou/DNN_NeuroSim_V1.0
Language:C++0 1 00
qlou/DNN_NeuroSim_V1.1
Language:C++0 1 00
qlou/EvaNN
This is a tool for DNN architecture energy modeling
Language:C++00
qlou/MLP_NeuroSim_V2.0
Language:C++0 1 00
qlou/MLP_NeuroSim_V3.0
Language:C++
qlou/MNSIM_V1.1
MNSIM version 1.1
Language:C++
qlou/Models
qlou/system-design-interview
System design interview for IT companies
qlou/uwimg
Build your own computer vision library in C
qlou/XPEsim
A simulator for RRAM-based neural processor engine.
Language:C++