Pinned Repositories
algo
数据结构和算法必知必会的50个代码实现
company-quickhelp
Documentation popup for Company
constellation
A Chisel RTL generator for network-on-chip interconnects
diagrammer
Provides dot visualizations of chisel/firrtl circuits
dl_accelerator
Deep Learning Accelerator Based on Eyeriss V2 Architecture with custom RISC-V extended instructions
doc-org
org-mode + latex + docker = pdf
DRAMPowerTraces
Trace files for the DRAMPower tool at ravenrd/DRAMPower
dramSimu
for ddr4/ddr3 simulation
emacs.d
Purcell's emacs configuration plus C/C++ support
evil
The extensible vi layer for Emacs.
qshan's Repositories
qshan/myenv
my env setting that cover .bashrc and .vimrc
qshan/tigervnc
High performance, multi-platform VNC client and server
qshan/book-searcher-z-lib
Easy and blazing-fast book searcher, create and search your private library. This project does not store and distribute copies of documents, but only provides indexing and searching.
qshan/caravel_user_project
https://caravel-user-project.readthedocs.io
qshan/chipyard
An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more
qshan/chisel-bootcamp
Generator Bootcamp Material: Learn Chisel the Right Way
qshan/chisel-template
A template project for beginning new Chisel work
qshan/chisel3
Chisel 3
qshan/chiselv
A RISC-V Core (RV32I) written in Chisel HDL
qshan/conda
OS-agnostic, system-level binary package manager and ecosystem
qshan/core-v-verif
Functional verification project for the CORE-V family of RISC-V cores.
qshan/coremark
CoreMark® is an industry-standard benchmark that measures the performance of central processing units (CPU) and embedded microcrontrollers (MCU).
qshan/ctags
A maintained ctags implementation
qshan/ctest_qshan
the folder for the C language study and practice
qshan/cva6
Ariane is a 6-stage RISC-V CPU capable of booting Linux
qshan/DL-on-Silicon
research, experimentation and implementation of hardware-agnostic accelerated DL framework
qshan/DRAMSys
DRAMSys4.0 a SystemC TLM-2.0 based DRAM simulator.
qshan/mill
Your shiny new Java/Scala build tool!
qshan/openc910
OpenXuantie - OpenC910 Core
qshan/OpenROAD-flow-scripts
qshan/riscof
qshan/riscv-arch-test
qshan/riscv-boom
Berkeley Out-of-Order Machine
qshan/riscv-mini
Simple RISC-V 3-stage Pipeline in Chisel
qshan/riscv-tests
qshan/rocket-chip
Rocket Chip Generator
qshan/SoC-Now-Generator
An open source Mini SoC Generator which will generate SoC based on parameters.
qshan/testchipip
qshan/verible
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, and formatter.
qshan/vim-markdown
Markdown Vim Mode