quartiq/bscan_spi_bitstreams
FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.
PythonMIT
Issues
- 8
Unable to geneated bscan_spi_xc6slx9t.bit
#15 opened by Dv-p - 1
Can I add support for XC7Z035? What should I do?
#14 opened by AIOT-CAT - 2
- 1
Unable to program QSPI flash
#11 opened by whik - 1
License
#10 opened by willmcenaney - 1
Support for Virtex 6 series
#9 opened by bl0x - 2
Regression in Spartan6 bitstreams
#2 opened by vzapolskiy - 0