/huedeon-gpu

FPGA GPU design for DE1-SoC

Primary LanguageCBSD 3-Clause "New" or "Revised" LicenseBSD-3-Clause

Huedeon GPU design

Triangle rasterizer with vertex-color and texturing support.

For Terasic DE1-SoC

gpu gpu2

my_video-2.mp4

Running with FuseSoC

sudo pip3 install fusesoc
fusesoc library add local .
fusesoc run --target=[TARGET] zxmarcos:huedeon:huedeon:0.0.1

Supported Targets

  • qmtech_xc7k325t_ddr3
  • de1-soc

Generate SVF from Vivado

vivado -mode batch -source data/qm_xc7k325t_ddr3_svf.cmd