raczben

https://stackoverflow.com/users/2506522/betontalpfa https://www.facebook.com/FPGAmeme/

Hungary

Pinned Repositories

AXI2SPI-bridge
Homework for Rendszerarchitekturak with Feher Béla & Wacha Gabor :)
Language:Verilog8 4 06
fliplot
HTML & Js based VCD viewer
Language:JavaScript59 4 1616
pysct
Python wrapper for Xilinx's XSCT/XSDB console
Language:Python6 2 15
tco_study
Case study of synchronous FPGA signaling by adjusting the output timing
Language:Tcl11 2 02
travis-hdl
Demonstrating continuous integration of hdl codes using travis-ci
Language:Shell5 1 05
VHDLFormatter
VHDL CLI code formatter written in TypeScript
Language:TypeScript3 2 41
wexpect
Windows variant of pexpect.
Language:Python74 4 6023
zynq_flash
QSPI flash support for Xilinx's Zynq devices
Language:C15 2 510

raczben's Repositories

raczben/AXI2SPI-bridge
Homework for Rendszerarchitekturak with Feher Béla & Wacha Gabor :)
Language:Verilog8 4 06
raczben/crossWord
Cross word game generator
Language:HTML10
raczben/parsimony
Parallel POST-XXX FPGA simulator
Language:C++1
raczben/ahkab
a SPICE-like electronic circuit simulator written in Python
Language:Python
raczben/dipterv1
Language:HTML
raczben/FPGALab
Labwork for FPGA LAB
raczben/hilehase
Language:Java
raczben/lovoldozos
Homework for Beagyazott szoft-tech.
Language:Java
raczben/macro-logger
A simplified logging system using macros.
1
raczben/python-vxi11
Provides a VXI-11 driver for controlling instruments over Ethernet
Language:Python
raczben/soundCompress
Language:Matlab
raczben/UVVM
Open Source VHDL Verification Library and Methodology - for very efficient VHDL verification of FPGA and ASIC - resulting also in a significant quality improvement
Language:VHDL