RISC-V Atom is an open-source soft-core processor platform targeted for FPGAs. It is complete hardware prototyping and software development environment based around Atom, which is a 32-bit embedded-class processor based on the RISC-V Instruction Set Architecture (ISA).
Key highlights of Atom are listed below:
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Implements RV32I + *M(optional) ISA as defined in the RISC-V unprivileged ISA manual.
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Simple 2-stage pipelined architecture, ideal for smaller FPGAs.
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Wishbone ready CPU interface.
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Interactive RTL simulator AtomSim.
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Wide range of example programs.
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Open source under MIT License.
*To be added soon
To checkout this project, Please refer to the Getting Started Guide:
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docs
: RISCV-Atom documentation: readthedocs. -
rtl
: Verilog sources.core
: RISCV-Atom core components.uncore
: RISCV-Atom non-core components (peripherals).dpi
: SystemVerilog DPI sources.
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scripts
: utility scripts. -
sim
: Atomsim source code.build
: Atomsim build files (autogenerated).docs
: Doxygen Documentation for Atomsim source code.include
: external libraries for atomsim.run
: Atomsim runtime files like hexdumps, vcd traces etc. (autogenerated)
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sw
: RISCV-Atom software sourcesexamples
: RISCV-Atom exampleslib
: libc for RISCV-Atom (libcatom)include
: libcatom headerslibcatom
: libcatom sourceslink
: RISC-V Atom linker scripts
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synth
:xilinx
: Synthesis project for xilinx FPGAsyosys
: Yosys synthesis scripts
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test
: RISCV Atom testsriscv-target
: Official RISC-V compliance test filesscar
: SCAR tests directory
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tools
: utility toolselfdump
: elfdump utility
- AtomShell: A simple shell for RISC-V Atom based SoCs : AtomShell Github
This project is open-source under MIT license!