This project demonstrates an analog clock displayed through VGA.
The display is 640×480 but consists of a 240×240 (scaled to 2×) frame buffer to limit the amount of 'memory' used.
Designed for the Intel (formerly Terasic) DE1 board.
This project demonstrates an analog clock displayed through VGA.
The display is 640×480 but consists of a 240×240 (scaled to 2×) frame buffer to limit the amount of 'memory' used.
Designed for the Intel (formerly Terasic) DE1 board.