rikushoney

Electronic Engineering student at Stellenbosch University.

Stellenbosch University

Pinned Repositories

aavm
ARM Assembler and Virtual Machine (AAVM)
Language:C++1 1 00
abc
ABC fork for VTS
Language:C0 0 00
dots
My dotfiles
Language:Shell0 1 00
JoSIM
Superconductor Circuit Simulator
Language:C++0 0 00
verilog-to-superconducting
Moved to https://github.com/rikushoney/vts
Language:C++2 1 00

rikushoney's Repositories

rikushoney/verilog-to-superconducting
Moved to https://github.com/rikushoney/vts
Language:C++2 1 00
rikushoney/aavm
ARM Assembler and Virtual Machine (AAVM)
Language:C++1 1 00
rikushoney/abc
ABC fork for VTS
Language:C0 0 00
rikushoney/dots
My dotfiles
Language:Shell0 1 00
rikushoney/JoSIM
Superconductor Circuit Simulator
Language:C++0 0 00
rikushoney/ngspice-mirror
Unofficial mirror of https://git.code.sf.net/p/ngspice/ngspice
Language:C0 1 00
rikushoney/llhd
Low Level Hardware Description — A foundation for building hardware design tools.
Language:Rust0 0
rikushoney/mise
dev tools, env vars, task runner
Language:Rust0 0
rikushoney/moore
A hardware compiler based on LLHD and CIRCT
Language:Rust0 0
rikushoney/ngspice-mirror-sync
1 0
rikushoney/pico-sdk
Language:C0 0
rikushoney/pyo3
Rust bindings for the Python interpreter
Language:Rust0 0
rikushoney/rikushoney.com
Personal website
Language:HTML1 0
rikushoney/rpi-rpm
Remote power management with a Raspberry Pi
Language:Python1 01
rikushoney/rsfq_mitll_pdk
MIT-LL SFQ5ee Cell Library
Language:Python0 0
rikushoney/vts
A framework for SFPGA architecture exploration
Language:Rust2 6
rikushoney/yosys
Yosys Open SYnthesis Suite
Language:C++0 01