riscv-non-isa/riscv-arch-test

What should I do first when using this?

Opened this issue · 3 comments

Are there any examples of this? These kinds of spreads seem overly complex to me. I'm sorry for asking such a stupid question. Do I need to install a program like Verilator while using this? I designed a processor, but I didn't understand what to do using this program. Is there a document explaining what I should do step by step? Since I'm new to these topics, I'd appreciate it if you could answer them, assuming I don't know much.

These tests are run via RISCOF, if you have written RTL of your own processor, then you have to create a plugin for your processor to make it compatible with RISCOF, you can check here to understand how to make a model plugin.
Also you can check this repo to look at the model plugins available for different DUTs. It will give you an idea on how to define a plugin for your own RTL.
For another sample, you can see this model plugin which is simple and can be reused for your RTL if it is running on Verilator.

Than

These tests are run via RISCOF, if you have written RTL of your own processor, then you have to create a plugin for your processor to make it compatible with RISCOF, you can check here to understand how to make a model plugin. Also you can check this repo to look at the model plugins available for different DUTs. It will give you an idea on how to define a plugin for your own RTL. For another sample, you can see this model plugin which is simple and can be reused for your RTL if it is running on Verilator.

Thank you very much. Iwill do this. I will search to this. so thanks.