Why the attribute of iohpmctr and iohpmevt.OF is RW?
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It seems to me that the only time the software reinitializes these registers, i.e., writes zero, is to handle an interrupt from hpm.
Would there be any other situation where the software would write these two registers?
I guess for example software that wants to block interrupts from hpm might write 1 to iohpmevt.OF. But I'm not sure that's true. And I can't think of a situation where software would write anything other than a nonzero value to iohpmctr.
The OF bit serves to a) indicate that the counter overflowed and b) as interrupt disable for that counter. The counter may be initialized to a starting value. See note in section 6.23. Initializing the counter to a non-zero value may be useful when performing some forms of analysis such as when the analyst wants to determine IOATC misses per 1000 requests. In this example, the analyst may configure one counter say A to count requests and set its counter value to (2^MAX-WIDTH - 1000) and a second counter B to count IOATC misses. When 1000 requests have been processed, the A will overflow leading to an interrupt and as part of the interrupt handling the value in A and B may be read to get the ratio B/A i.e. IOATC misses/per-kilo-requests. The analyst may then program A again to a (2^MAX-WIDTH-1000) and perhaps zero B to arm the PMU to cause an interrupt again for next sample period.
I see. Thanks for your answer.