trigger[2:0] behaviors for exception

Question

trigger[2:0] behaviors for exception

zhonghochen opened this issue 3 years ago · 5 comments

zhonghochen commented 3 years ago

Hi, Guys

https://github.com/riscv/riscv-trace-spec/blob/9896e28a5b35d86178c08e77e0ae6daaafeba072/ingressPort.tex#L492-L493

Could you help to clarify whether trigger[2:0] should be generated for non-retired instruction?

mcontrol.execute is set,
An instruction matches the trigger, and
The instruction causes an exception (e.g. ecall, illegal instruction, and address misaligned)

Regards,
Zhong-Ho

gajinderpanesar commented 2 years ago

Resolved

Answer 1 · 2021-09-06T08:14:41.000Z

Zhong-Ho, I think it depends how you want to trace the instruction. Do you want to start tracing from when this instruction is retired, or do you also want to trace the exception handler? If you want to include the exception handler in the trace, then assert trigger[0] when the exception is reported. If you only want to trace from when the instruction retires, then only assert trigger[0] if the instruction actually retires (many instructions that cause an exception will be re-executed and retired after the exception handler has completed). (Note that ecall retires and generates an exception) Iain Iain Robertson, Engineering Director, Hardware Tessent Silicon Lifecycle Solutions, Siemens EDA ***@***.******@***.***> | mobile: +44 (0)7743 369213 siemens.com/eda [A picture containing text, clock Description automatically generated] From: zhonghochen ***@***.***> Sent: 06 September 2021 02:56 To: riscv/riscv-trace-spec ***@***.***> Cc: Subscribed ***@***.***> Subject: [riscv/riscv-trace-spec] trigger[2:0] behaviors for exception (#60) Hi, Guys https://github.com/riscv/riscv-trace-spec/blob/9896e28a5b35d86178c08e77e0ae6daaafeba072/ingressPort.tex#L492-L493 Could you help to clarify whether trigger[2:0] should be generated for non-retired instruction? * mcontrol.execute is set, * An instruction matches the trigger, and * The instruction causes an exception (e.g. ecall, illegal instruction, and address misaligned) Regards, Zhong-Ho — You are receiving this because you are subscribed to this thread. Reply to this email directly, view it on GitHub<#60>, or unsubscribe<https://github.com/notifications/unsubscribe-auth/ALQOPSTZKJAK6JR5TXAR3LLUAQNSZANCNFSM5DPN7YPQ>. Triage notifications on the go with GitHub Mobile for iOS<https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android<https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

Answer 2 · 2021-09-06T10:57:01.000Z

Hi, Iain,

Thanks for your replies. Since the behavior is dependent on usage, do you think the timing field in mcontrol can be used to control the behavior of trigger[2:0] ?

Regards,
Zhong-Ho

Answer 3 · 2021-09-06T16:02:45.000Z

Zhong-Ho, I’m going to have to defer that question to someone more familiar with the Debug Module than myself. Iain From: zhonghochen ***@***.***> Sent: 06 September 2021 11:57 To: riscv/riscv-trace-spec ***@***.***> Cc: Robertson, Iain ***@***.***>; Comment ***@***.***> Subject: Re: [riscv/riscv-trace-spec] trigger[2:0] behaviors for exception (#60) Hi, Iain, Thanks for your replies. Since the behavior is dependent on usage, do you think the timing field in mcontrol can be used to control the behavior of trigger[2:0] ? Regards, Zhong-Ho — You are receiving this because you commented. Reply to this email directly, view it on GitHub<#60 (comment)>, or unsubscribe<https://github.com/notifications/unsubscribe-auth/ALQOPSXY4WN7E6TA4BUA7JDUASNARANCNFSM5DPN7YPQ>. Triage notifications on the go with GitHub Mobile for iOS<https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675> or Android<https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub>.

Answer 4 · 2021-09-10T21:30:10.000Z

That behavior is a property of the trigger module, not trace. Trace does whatever the trigger module tells it to do.

I opened riscv/riscv-debug-spec#670 about this. There I gave what I'm reasonably sure is the correct answer but we'll see if there are any other opinions. That debug spec issue will make sure that the spec gets clarified by the debug task group (which will likely be done by me).