Description of tvalepc field in section 7.3.1 contain inaccurate/incomplete information

[bmcspadd-seagate]

The offending text is:

The trap value is
set to the address of the faulting instruction for hardware breakpoints, access or page faults and
instructions, loads or stores that are mis-aligned, but not for illegal instructions (for which it is set
to the opcode).

The values of the tval register are more completely described in the Privileged Architecture Spec
in the "Machine Trap Value Register (mtval)" section (section 3.1.16). It would perhaps be better
to simply say that tvalepc contains tval and then point the reader to the Priv Spec. However,
you will have to keep the text describing the case where tvalepc contains the epc of an illegal
instruction.

If issue number #66 is adopted, then you will simply need to refer the reader to the Priv Spec for
both epc and tval.