riscv-non-isa/tg-nexus-trace

PIB parallel: byte count in header

jlucnagel opened this issue · 1 comments

In "PIB Parallel Protocol" section of the RISC-V-Trace-Control-Interface document, the following sentence is not clear:
"For RISC-V Processor Trace, the header byte includes a byte count."
Where is this byte count specified ? Is it specific to the PIB parallel protocol or should it come from the trace encoder ?

This is related to 're-use' of PIB by ratified Processor Trace Spec.
Nexus has embedded packet framing (via MSEO bits), so all bytes output from trace encoder are '1-to-1' present on PIB pins.
Processor trace does not have such 'framing' defined and they say encoder packet[s] must have a header and this header must define packet size.
Please note, that with current PIB protocol, entire packet must be sent in N consecutive PIB bytes (using 1/2/4/8/... bits).
In other words, PIB should not start transferring packet/message before it is certain, that last byte of particular packet/message will be available.