/altera_max_10

Altera MAX 10, Nios II/e Core, Marvell 88E1111 Phy

Primary LanguageVerilog

Emulate a high performance MAC on an ALTERA MAX 10 FPGA

Questa Prime Lite with Nios II Eclipse

Using a Nios II/e Core, Marvell 88E1111 PHY