Pinned Repositories
avsdpll_1v8
8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x multiplied clock at ~50% duty cycle on tt corner at room temperature.
cheatsheets
cheatsheets para estudos de eletrônica
circuit-samples
Circuit samples and simulations for sky130 pdk and other generalities.
code-samples
filtros
limthesis
Modèle de thèse UNILIM/XLIM
pdscodes
Code snippets and notebooks used in PDS classes.
pylayers
tex-circuit
A circuit(ikz) document bypass for ploting good quality circuit diagrams
rsmarinho's Repositories
rsmarinho/tex-circuit
A circuit(ikz) document bypass for ploting good quality circuit diagrams
rsmarinho/filtros
rsmarinho/limthesis
Modèle de thèse UNILIM/XLIM
rsmarinho/pdscodes
Code snippets and notebooks used in PDS classes.
rsmarinho/pylayers
rsmarinho/avsdpll_1v8
8x PLL Clock Multiplier IP with an input frequency range of 5Mhz to 12.5Mhz and output frequency range of 40Mhz to 100Mhz, giving a 8x multiplied clock at ~50% duty cycle on tt corner at room temperature.
rsmarinho/cheatsheets
cheatsheets para estudos de eletrônica
rsmarinho/circuit-samples
Circuit samples and simulations for sky130 pdk and other generalities.
rsmarinho/code-samples
rsmarinho/digicomm
digicomm
rsmarinho/ecci_labs
rsmarinho/fdtd
rsmarinho/fdtd-1
A 3D electromagnetic FDTD simulator written in Python
rsmarinho/inf
rsmarinho/microwave
rsmarinho/notebooks
Some (not so) usefull notebooks stuff.
rsmarinho/ruby
Ruby training for friends
rsmarinho/tcx2gpx
TCX to GP file converter
rsmarinho/uFDTD
Content for "Understanding the FDTD Method" by John B. Schneider
rsmarinho/webpage