Pinned Repositories
NyuziProcessor
GPGPU microprocessor architecture
android_device_samsung_maguro
android_kernel_samsung_tuna
Samsung Galaxy Nexus (GT-I9250)
anycore-dbg-supplement
A bundle of auxiliary scripts for the Anycore project
anycore-riscv
The AnyCore toolset targetting the RISC-V ISA
DIVAFILE_Tool
A cmdline tool for extracting or creating the DIVAFILE found in SEGA's rhythm game Project DIVA F2&X.
FastMultiplier
a fast multiplier implement using verilog
Nyuzi_StackTracer
A Nyuzi GPGPU debug helper
OpenPiton-ZC706
An OpenPiton ZC706 port. The latest version of OpenPiton on Github: https://github.com/PrincetonUniversity/openpiton
XUPV5-LX110T_EDK_Config
An EDK board config for XUPV5-LX110T tested with EDK 14.7
s117's Repositories
s117/SimPoint
SimPoint 3.2, with build error resolved for GCC 9.3.0
s117/NS2-Server-Watchdog
A watchdog script for NS2 dedicated server
s117/riscv-isa-sim
RISC-V Functional ISA Simulator
s117/anycore-dbg-supplement
A bundle of auxiliary scripts for the Anycore project
s117/anycore-riscv
The AnyCore toolset targetting the RISC-V ISA
s117/AC-Villager-Compatibility-Check
Check compatibility for your Animal Crossing villagers, just for fun.
s117/antigen-disable-compfix
s117/anycore-riscv-tests
A small suite of tests for AnyCore RISC-V
s117/CA
s117/ChatGPT-Next-Web
A cross-platform ChatGPT/Gemini UI (Web / PWA / Linux / Win / MacOS). 一键拥有你自己的跨平台 ChatGPT/Gemini 应用。
s117/freedom
Source files for SiFive's Freedom platforms
s117/gem5
The official repository for the gem5 computer-system architecture simulator.
s117/ghidra-pyi-generator
Generates `.pyi` type stubs for the entire Ghidra API
s117/llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
s117/miabyss-s2-commentary-track-subtitle-chs
《来自深渊：烈日黄金乡》 评论音轨 简体中文字幕
s117/NeteaseCloudMusic_PythonSDK
NeteaseCloudMusic封装的Python SDK，网易云API Python版本。纯Python使用网易云音乐接口，无需后端。现已同步原项目接口且测试通过的有200多个，已发布到pypi，可直接使用pip安装。
s117/PK
Public key
s117/riscv-binutils-gdb
RISC-V backports for binutils-gdb. Development is done upstream at the FSF.
s117/riscv-dpi
The DPI code required for cosimulation of AnyCore RISC-V
s117/riscv-fesvr
RISC-V Frontend Server
s117/riscv-gcc
s117/riscv-glibc
RISC-V port of GNU's libc
s117/riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC
s117/riscv-isa-sim-extension-insn-stream-logger
s117/riscv-newlib
RISC-V port of newlib
s117/riscv-pk
RISC-V Proxy Kernel
s117/riscv-simenv
s117/sge
Some Grid Engine/Son of Grid Engine/Sun Grid Engine
s117/simenv_strace_collect_harness
s117/Speckle
A wrapper for the SPEC CPU2006 benchmark suite.