Pinned Repositories
-Xininx-Vivado-Alternative-litex-
Build your hardware, easily!
A-Primer-For-Physical-Design-Automation
This repository contains python code snippets that implement several algorithms for automating the VLSI Physical Design process. This is based on the learnings from the course - EE5333W (Introduction to Physical Design Automation) at IITM.
Analog-Design-of-Asynchronous-SAR-ADC
This project discusses the design of an 8-bit asynchronous successive approximation register (SAR) analog-to-digital converter (ADC) implemented in 45nm CMOS technology.
ArpitSinghYadav.com
Brice-Columber-cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
chipcraft---mest-course
CircuitOps-OpenROAD-IITG
Companies-List-Startup-and-All
This repository contains opportunities for you to apply to more than 400 product base companies(NOT JUST FAANGM) & good start-ups.
detect-waste
AI to Combat Environmental Pollution - detecting plastic waste in the environment to combat environmental pollution and promote circular economy (Deep Learning, PyTorch)
sahilmaurya007's Repositories
sahilmaurya007/-Xininx-Vivado-Alternative-litex-
Build your hardware, easily!
sahilmaurya007/A-Primer-For-Physical-Design-Automation
This repository contains python code snippets that implement several algorithms for automating the VLSI Physical Design process. This is based on the learnings from the course - EE5333W (Introduction to Physical Design Automation) at IITM.
sahilmaurya007/ArpitSinghYadav.com
sahilmaurya007/Brice-Columber-cva6
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
sahilmaurya007/chipcraft---mest-course
sahilmaurya007/Companies-List-Startup-and-All
This repository contains opportunities for you to apply to more than 400 product base companies(NOT JUST FAANGM) & good start-ups.
sahilmaurya007/EE628
EE 628: Analysis and Design of Integrated Circuits (University of Hawaiʻi at Mānoa)
sahilmaurya007/f4pga-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
sahilmaurya007/gdsfactory-generic-pdk
Generic Process Design Kit for Gdsfactory
sahilmaurya007/FPGA_Projects_SaifAlomari
This Repository is to showcase Saif Alomari's FPGA projects
sahilmaurya007/lambdalib
Hardware abstraction library
sahilmaurya007/learn-RiscV-from-basics-
Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.
sahilmaurya007/List-Of-Remote-Companies-
A list of semi to fully remote-friendly companies (jobs) in tech.
sahilmaurya007/LUMOS
Light Utilization with Multicycle Operational Stages (LUMOS) RISC-V Processor
sahilmaurya007/MATLAB-Simulink-Challenge-Project-Hub
This MATLAB and Simulink Challenge Project Hub contains a list of research and design project ideas. These projects will help you gain practical experience and insight into technology trends and industry directions.
sahilmaurya007/qflow
This repo is test for qflow opensource
sahilmaurya007/Raptor-OPEN-SOURCE-FPGA-
Raptor end-to-end FPGA Compiler and GUI
sahilmaurya007/Research-Internships-for-Undergraduates
List of Research Internships for Undergraduate Students
sahilmaurya007/Ripes-IIT-Roorkee-RISC-simulator-
A graphical processor simulator and assembly editor for the RISC-V ISA
sahilmaurya007/sahil-maurya-website
Welcome to my profile
sahilmaurya007/scgallery-VLSI-Alternate-tools-
SiliconCompiler Design Gallery
sahilmaurya007/siliconcompiler
A modular build system for hardware
sahilmaurya007/sscs-ose-chipathon.github.io
sahilmaurya007/test1_openlane
sahilmaurya007/tt06-silicon-tinytapeout-lm07
This projects reads a SPI-based temperature sensor LM07 and displays the temperature on a 7-segment display
sahilmaurya007/Vedic-Multiplier-From-RTL2GDS
GitHub repository dedicated to VLSI ASIC Design using open-source tools! A simple Vedic Multiplier is Forged, through the entire RTL to GDS process that meets various PPA
sahilmaurya007/veryl-A-Modern-HDL-Used-In-Japan-
Veryl: A Modern Hardware Description Language
sahilmaurya007/VLSI-ASIC-Design-Flow
This repository is dedicated to VLSI ASIC Design Flow using open-source tools! Here, we embark on a journey that starts with specifications, RTL DV, Synthesis, Physical Design, Signoff and Finally Tape-It-Out
sahilmaurya007/vlsi_linkedin_index-All-VLSI-GIT-
This repo provide an index of VLSI content creators and their materials
sahilmaurya007/zigzag-DNN-HARDWARE-ACCELERATOR
HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators