Pinned Repositories
amber
amber core from opencores.org
ARM_PROCESSOR
AsyncARM
or1200
OpenRISC 1200 implementation
potato
A simple RISC-V processor for use in FPGA designs.
pulpino
An open-source microcontroller system based on RISC-V
riscv-sodor
educational microarchitectures for risc-v isa
riscv-tests
riscv-tools
RISC-V Tools (GNU Toolchain, ISA Simulator, Tests)
rocket
Rocket Microarchitectural Implementation of RISC-V ISA
santhoshvlsi's Repositories
santhoshvlsi/rocket
Rocket Microarchitectural Implementation of RISC-V ISA
santhoshvlsi/riscv-sodor
educational microarchitectures for risc-v isa
santhoshvlsi/riscv-tests
santhoshvlsi/riscv-tools
RISC-V Tools (GNU Toolchain, ISA Simulator, Tests)
santhoshvlsi/amber
amber core from opencores.org
santhoshvlsi/ARM_PROCESSOR
santhoshvlsi/AsyncARM
santhoshvlsi/or1200
OpenRISC 1200 implementation
santhoshvlsi/potato
A simple RISC-V processor for use in FPGA designs.
santhoshvlsi/pulpino
An open-source microcontroller system based on RISC-V
santhoshvlsi/risc_processor
Simple 32-bit RISC processor
santhoshvlsi/riscv-gnu-toolchain
GNU toolchain for RISC-V, including GCC 4.9.2
santhoshvlsi/rocket-chip
Rocket Chip Generator
santhoshvlsi/uncore