While VALU should take 4 cycles to execute, it should not be a pipeline.

[syifan]

To Reproduce
MGPUSim version of commit ID: 7810efc

Command that recreates the problem

./fir -length=65535 -timing -trace-vis

Current behavior
Assuming the instruction issuer is modified so that it can issue one wavefront per wfpool per cycle. The current VALU implementation can finish one instruction per cycle per SIMD unit. However, it should only complete one instruction per 4 cycles.

Expected behavior
A SIMD unit should only complete one instruction per 4 cycles.