satyaprakashakula

Cell-SPU-Lite-Multimedia-Processor

Hardware-Generation-Tool-HGT-for-Fully-Connected-Neural-Network

Matrix-Vector-Multiplier

RTL Design

Synchronous-FIFO

SystemVerilog-design-for-neural-network-layer-with-AXI4-Stream-Interface

satyaprakashakula/Cell-SPU-Lite-Multimedia-Processor

satyaprakashakula/Hardware-Generation-Tool-HGT-for-Fully-Connected-Neural-Network

satyaprakashakula/Matrix-Vector-Multiplier

RTL Design

satyaprakashakula/Synchronous-FIFO

satyaprakashakula/SystemVerilog-design-for-neural-network-layer-with-AXI4-Stream-Interface