[question] How to load key to the AES core
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Hi, I am very new here, and I am still very confused here after reviewing the AES core. I am not sure if the key is stored in one of local parameters on the AES core, or it is stored outside the AES core.
If the key is stored beyond the core, I donot know how to load it to the core according to the port definition on the top file. It is just write_data/read_data for encrypted/decrypted data, and address for registers.
Hi!
I assume that you are talking about the aes.v file, the top level wrapper. That file provides a simple interface a CPU core can use to read and write 32-bit words as needed to use the AES core. Writing a key for example means setting the address port to 0x10 .. 0x17 (eight 32-bit words for a 256 bit key). For each word, setting the write enable (we) port and then toggling the chip select (cs) port 0->1->0. The same mechism is used to write the block to be processed, and to read out the result (but then not setting the we port).
If you look in the source code for aes.v, row 105-106, and 243-244 you can see an array with eight 32-bit registers being defined, and then later on written to.
I hope this explains the usage. If you don't need the top level wrapper, you can instead use the aes_core.v file, which provides wide interfaces for key, block and result.
Will close this issue in a week.
Ah, I am working on other school work now. I think I will return to this project on the summer. Sorry I can not have more feedback regarding on the progress.
Ok. Reopen or create a new one when you've taken a look at this again.