Pinned Repositories
axi_rtl_demo
Example implementation of AXI in Verilog.
bits-pilani-thesis-template-latex
LaTeX Template for Reports required of BITS Pilani students (Thesis, Practice School, PhD, Projects - Study, Lab, Design)
Chips-2.0
FPGA Design Suite based on C to Verilog design flow.
chips_v
RISC-V System on Chip Builder
CircuitFigures
Drawings of common circuit elements in powerpoint
distributed-systems-readings
Readings in distributed systems
envrc
contains the vimrc, bashrc & vim plugin update scripts
experiments
FPGA-radio
Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC
Implementation-of-Signal-Processing-Algorithm-on-a-smartphone
Contains codes used for implementation of signal processing algorithm on smart phone
selvagit's Repositories
selvagit/axi_rtl_demo
Example implementation of AXI in Verilog.
selvagit/bits-pilani-thesis-template-latex
LaTeX Template for Reports required of BITS Pilani students (Thesis, Practice School, PhD, Projects - Study, Lab, Design)
selvagit/Chips-2.0
FPGA Design Suite based on C to Verilog design flow.
selvagit/chips_v
RISC-V System on Chip Builder
selvagit/CircuitFigures
Drawings of common circuit elements in powerpoint
selvagit/distributed-systems-readings
Readings in distributed systems
selvagit/envrc
contains the vimrc, bashrc & vim plugin update scripts
selvagit/experiments
selvagit/FPGA-radio
Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC
selvagit/Implementation-of-Signal-Processing-Algorithm-on-a-smartphone
Contains codes used for implementation of signal processing algorithm on smart phone
selvagit/just-the-docs
A modern, high customizable, responsive Jekyll theme for documention with built-in search.
selvagit/lowrisc-chip
The root repo for lowRISC project and FPGA demos.
selvagit/mtech_dessertation
Repo for the dessertation activity
selvagit/selvagit.github.io
selvagit/sva-demos
SVA examples and demonstration
selvagit/svReadWrite_pcap
simple read/write pcap tasks for SystemVerilog test
selvagit/urjtag
urjtag from upstream on sourceforge http://sourceforge.net/projects/urjtag/
selvagit/verilog-math
Mathematical Functions in Verilog
selvagit/verilog-utils
native Verilog pcap, littletoe, bcd, xml and hash modules, with Icarus testbenches