A board for connecting FreeLink headers to RISC-V JTAG port on VEGA-Lite development board.
Work for VEGA-Lite only, doesn't work with VEGAboard.
Designed with KiCad 5.1.4.
Issues and pull requests are welcome, always.
Copyright (c) 2019 SHA Miao <sha@miao.im>
This project is licensed under Solderpad Hardware License v. 0.51 (LICENSE).