shanyinshuiyue's Stars
uclinux-dev/elf2flt
ELF to bFLT (binary flat) converter for no-mmu Linux targets
xharrym/tk_jtag
Access Altera FPGA with JTAG and a Tcl/Tk Form
jadarve/jtag_server
JTAG server for Altera FPGA designs
aprgl/jtag_socket
Terminal command to Altera JTAG
spugnut/vJTAGTimer
A tiny repository for the project described at https://nextstatefail.wordpress.com/2018/11/25/jtag/
DouglasWWolf/nexys_packet_header_demo
Demonstration of how to add a packet header to an AXI stream
enjoy-digital/litex_m2sdr
LiteX based M2 SDR FPGA board.
pulp-platform/axi_llc
pulp-platform/cheshire-ihp130-o
wlmnzf/HDL-FOR-ARM
vlvassilev/network-interconnect-tester-cores
Library of cores for network interconnect tester instruments
freecores/versatile_library
Versatile library
JakeHafele101/FPGA-Library
This is a code bank of useful FPGA modules that are apart of all my other projects. This can include modules for FPGA I/O, Serial communication, or useful state machines such as counters.
robfinch/Utility
Contains utility modules
robfinch/Cores
marksheahan/adc_spi_to_axism
Convert from serial data in to an AXI-4 Stream master data source
SanjayRai/PCIE_AXI_BRIDGE
Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
ZipCPU/sdspi
SD-Card controller, using either SPI, SDIO, or eMMC interfaces
raczben/AXI2SPI-bridge
Homework for Rendszerarchitekturak with Feher Béla & Wacha Gabor :)
Wissance/QuickSPI
Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface
cornell-zhang/facedetect-fpga
ngdxzy/FF_Test
xiahouzuoxin/notes
研究生阶段的一些文章(技术、思考、读书笔记、日常琐事等)
nasa/eefs
EEPROM File System
kenjihiranabe/The-Art-of-Linear-Algebra
Graphic notes on Gilbert Strang's "Linear Algebra for Everyone"
kinton/jtag_verilog
Jtag Verilog open source resource based simulation (e.g. Intel, etc.)
jgaeddert/liquid-dsp
digital signal processing library for software-defined radios
wavelet-lab/usdr-lib
uSDR software libraries and utilities
wavelet-lab/usdr-fpga
FPGA for uSDR
YnuGuoLab/Approx_Mul_FPGA