/sled-fpga-hub75

Verilog code to let an iCE40 FPGA drive a HUB75, yet still getting pixel data from sled.

Primary LanguageVerilogISC LicenseISC

sled-fpga-hub75

Verilog code to drive HUB75 matrices with FPGAs from sled.

Building

Install icestorm for your computer once:

sudo apt-get install build-essential clang bison flex libreadline-dev \
                     gawk tcl-dev libffi-dev git mercurial graphviz   \
                     xdot pkg-config python python3 libftdi-dev

mkdir icestorm-build
cd icestorm-build

git clone https://github.com/cliffordwolf/icestorm.git icestorm
cd icestorm
make -j$(nproc)
sudo make install
cd ..


git clone https://github.com/cseed/arachne-pnr.git arachne-pnr
cd arachne-pnr
make -j$(nproc)
sudo make install
cd ..

git clone https://github.com/cliffordwolf/yosys.git yosys
cd yosys
make -j$(nproc)
sudo make install
cd ..

Then flash the prototype BX boards with tinyprog.