/Simple-RISC-V-testbench

A public testbench for RISC-V design (MR329)

Primary LanguageC++GNU General Public License v3.0GPL-3.0

Simple-RISC-V-testbench

A public testbench for RISC-V design (MR329). The directory test includes all the test cases in assembly. The directory emulator includes the source code of an emulator written in C++. The directory assembler includes the ELF file of assembler.

How to use?

This is an automatic testbench for the course design of MR329 (Computer Architecture). It use the GitHub Action as the test environment and compare your HDL source files’ simulation result with an emulator written in C.

To use this testbench:

  1. Fork this repository. If you don’t wish to have a public repository containing your source code, initialize an empty private repository and copy all the stuff into your new repository. For more reference, see private_fork. Note that you should follow GPLv3, i.e. don’t forget to include the license in your new repository.
  2. Clone the forked repository to your host machine and modify the files testbench in single and testbench in pipeline
    for (i = 0; i <= 1023; i = i+1) begin
       $fwrite(handle, "%h\n", riscv_soc_tb.data_mem0.data[i]); // change the riscv_soc_tb.data_mem0.data[i] to the instance of your data memory
    end
        
    for (i = 1; i <= 31; i = i+1) begin
       $fwrite(handle, "%h\n", riscv_soc_tb.riscv0.RF.register_file[i]); // change the riscv_soc_tb.riscv0.RF.register_file[i] to the instance of your register file
    end
        
  3. Move your source file to single and pipeline
  4. Properly place `include in each file to make a full hierarchy relation. See the illustration below.
  5. Commit, push and wait for the result.
  6. Change the file yosys.yaml and testbench.sh to change the test target (disable pipeline test, etc.). For example, you want to close pipeline check, just comment related line:

Simple-RISC-V-testbench/2020-12-18_22-31-32_screenshot.png

Simple-RISC-V-testbench/2020-12-18_23-05-14_screenshot.png

Simple-RISC-V-testbench/2020-12-18_23-05-40_screenshot.png

Something more

If you can pass all the test cases, your HDL sources is likely to be correct. If you find any problem with the testbench or have some good(vicious) test case, please do not hesitate to contact me, raise an issue or make a pull request directly.

This repository comes with the GPLv3 license. All of its part except for the binary assembler is restricted by the GPLv3 license.