ss2783

ss2783's Stars

• Veedrac/microarchitecturometer

  Measures microarchitectural details such as ROB size. Like https://github.com/travisdowns/robsize but without runtime code generation, which doesn't work on some platforms. Public domain except where otherwise noted.

  Language:Python11419

• chximn/CPU

  Intel's x86-64 Architecture Simulation in C++

  Language:C++19417

• cs01/gdbgui

  Browser-based frontend to gdb (gnu debugger). Add breakpoints, view the stack, visualize data structures, and more in C, C++, Go, Rust, and Fortran. Run gdbgui from the terminal and a new tab will open in your browser.

  Language:TypeScript9.8k496

• cyrus-and/gdb-dashboard

  Modular visual interface for GDB in Python

  Language:Python10.9k765

• kpouget/tuto-gdb.py

  Language:HTML91

• jameshanlon/netlist-paths

  A library and command-line tool for querying a Verilog netlist.

  Language:C++263

• tommyod/awesome-pandas

  A collection of resources for pandas (Python) and related subjects.

  Language:Jupyter Notebook501103

• tommythorn/expjit3

  Proof of concept dynamic code generation

  Language:C2

• tommythorn/Reduceron

  FPGA Haskell machine with game changing performance. Reduceron is Matthew Naylor, Colin Runciman and Jason Reich's high performance FPGA softcore for running lazy functional programs, including hardware garbage collection. Reduceron has been implemented on various FPGAs with clock frequency ranging from 60 to 150 MHz depending on the FPGA. A high degree of parallelism allows Reduceron to implement graph evaluation very efficiently. This fork aims to continue development on this, with a view to practical applications. Comments, questions, etc are welcome.

  Language:Haskell42029

• esperantotech/boom-template

  A template for building new projects/platforms using the BOOM core.

  Language:Shell2421

• chipsalliance/chisel

  Chisel: A Modern Hardware Design Language

  Language:Scala3.9k585