Pinned Repositories
aie-rt
bootgen
bootgen source code
brutus
circt
Circuit IR Compilers and Tools
event_queue
handshake
Handshake Dialect in MLIR
MLIRAccelerators
onnx
Open standard for machine learning interoperability
vyasa
Xilinx Modifications to Halide
llvm-aie
Fork of LLVM to support AMD AIEngine processors
stephenneuendorffer's Repositories
stephenneuendorffer/vyasa
Xilinx Modifications to Halide
stephenneuendorffer/event_queue
stephenneuendorffer/handshake
Handshake Dialect in MLIR
stephenneuendorffer/MLIRAccelerators
stephenneuendorffer/onnx
Open standard for machine learning interoperability
stephenneuendorffer/aie-rt
stephenneuendorffer/bootgen
bootgen source code
stephenneuendorffer/brutus
stephenneuendorffer/circt
Circuit IR Compilers and Tools
stephenneuendorffer/cmakeModules
stephenneuendorffer/hls_tuner
stephenneuendorffer/llvm-premerge-checks
CI system for premerge-testing in LLVM project
stephenneuendorffer/iree-amd-aie
IREE plugin repository for the AMD AIE accelerator
stephenneuendorffer/llvm-aie
stephenneuendorffer/llvm-project
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
stephenneuendorffer/mlir
"Multi-Level Intermediate Representation" Compiler Infrastructure
stephenneuendorffer/mlir-aie
An MLIR-based toolchain for Xilinx Versal AIEngine-based devices.
stephenneuendorffer/mlir-air
stephenneuendorffer/mlir-npcomp
stephenneuendorffer/mlir-python-extras
The missing pieces (as far as boilerplate reduction goes) of the upstream MLIR python bindings.
stephenneuendorffer/mlir-www
stephenneuendorffer/mlir-xten
stephenneuendorffer/onnx-mlir
Representation and Reference Lowering of ONNX Models in MLIR Compiler Infrastructure
stephenneuendorffer/Polygeist
stephenneuendorffer/PYNQ
Python Productivity for ZYNQ
stephenneuendorffer/PYNQ-Networking
Networking Overlay on PYNQ
stephenneuendorffer/santorini