stevenfans

Computer Engineering Student from CSULB with a passion for hardware/software projects.

Pinned Repositories

Algorithms
Data Structures and Algorithms
Language:Java00
Home-Secuirty-System
Laser trip wire secuirty system.
Language:C00
Pong-Game
One player pong game designed in verilog.
Language:Verilog00
Smart-Garage-and-Car
Language:C00
TV-Remote
Language:C00
Tone-Generator
Language:C00
2-Player-Pong-Game
2- player pong game with background color changing switches and cheating switch.
Language:Verilog00
Alpaca
Language:Python00
Analog-Ir-and-PWM
Language:C00
CECS-229
Language:Python01

stevenfans's Repositories

stevenfans/Django-Practice
Language:Python
stevenfans/DonkeyKong
Language:C#
stevenfans/CubeDoge
First Unity Game.
Language:C#
stevenfans/Scraper
Language:Python
stevenfans/To-Do-App
Language:Python
stevenfans/Rubiks-Cube
CSULB 490A and B senior project
Language:C
stevenfans/Alpaca
Language:Python
stevenfans/RISC-V
Language:C
stevenfans/Probability-and-Statistics
Python projects for probability
Language:Python
stevenfans/Algorithms
Data Structures and Algorithms
Language:Java
stevenfans/Numerical-Methods
Language:MATLAB
stevenfans/CECS-271
Language:MATLAB
stevenfans/TV-Remote
Language:C
stevenfans/Tone-Generator
Language:C
stevenfans/CECS-229
Language:Python1
stevenfans/PhyloTree
Tired of making phylum trees? This will help solve the issue by using the shortest distance algorithm.
Language:Python
stevenfans/Smart-Garage-and-Car
Language:C
stevenfans/Wall-Follower-Robot
Language:C
stevenfans/Rx-Engine
Language:VHDL
stevenfans/Analog-Ir-and-PWM
Language:C
stevenfans/Counter-for-TrameBlaze-Processor
Language:HTML
stevenfans/Smart-Garage
Language:C
stevenfans/Home-Secuirty-System
Laser trip wire secuirty system.
Language:C
stevenfans/Traffic-Light-Controller
4- way intersection traffic light
Language:Assembly
stevenfans/2-Player-Pong-Game
2- player pong game with background color changing switches and cheating switch.
Language:Verilog
stevenfans/Pong-Game
One player pong game designed in verilog.
Language:Verilog