Issues
- 3
CPLD latch output issues
#5 opened by briansune - 3
rd_ready signal missing
#4 opened by navrajkambo - 5
Multiple modules accessing SDRAM
#2 opened by milanvidakovic - 3
Some addresses are not accessable
#1 opened by parkhalov - 1
rd_enable latching (or lack of it)
#3 opened by feldi12