STM32F407G-DISC1 Clock configuration - HSI/HSE values mismatch?

[hamkoroke]

Describe the bug
Not totally sure but for the variant STM32F407G-DISC1 the clock configuration says that is using HSI but the value for:

RCC_OscInitStruct.PLL.PLLM = 8; // shouldn't be 16 for the previous setting of using HSI?

is 8, but it seems that it might set to the value 16 instead when HSI is used instead of HSE?

There is a related issue by an user that had a problem with this (not using stm32duino but seems related): Issue

The documentation of the board, UM1472 - STM32F4DISCOVERY User Manual, Section 6.9 (OSC Clock Supply)​ also states:

MCO from ST-LINK. From MCO of the STM32F103. This frequency cannot be changed, it is fixed at 8 MHz and connected to PH0-OSC_IN of the STM32F407VG

So maybe if HSE is used, then that value would be correct (8) but for HSI should be set to 16?
The thing is that if there is an external oscillator is probably recommended to use HSE intead of HSI?

Thank you.

Board (please complete the following information):

• Name: STM32F407G-DISC1

[fpistm]

Hi @hamkoroke
The Disco uses the HSE, the link you provide is not the correct one, this is the one for the generic.
Hereafter the clock config used by the Disco:

Arduino_Core_STM32/variants/STM32F4xx/F407V(E-G)T_F417V(E-G)T/variant_DISCO_F407VG.cpp

Lines 150 to 197 in eebd0e3

	WEAK void SystemClock_Config(void)
	{
	RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
	RCC_OscInitTypeDef RCC_OscInitStruct = {};
	/* Enable Power Control clock */
	__HAL_RCC_PWR_CLK_ENABLE();
	/* The voltage scaling allows optimizing the power consumption when the device is
	clocked below the maximum system frequency, to update the voltage scaling value
	regarding system frequency refer to product datasheet. */
	__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
	/* Enable HSE Oscillator and activate PLL with HSE as source */
	RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
	RCC_OscInitStruct.HSEState = RCC_HSE_ON;
	RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
	RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
	RCC_OscInitStruct.PLL.PLLM = 8;
	RCC_OscInitStruct.PLL.PLLN = 336;
	RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
	RCC_OscInitStruct.PLL.PLLQ = 7;
	if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
	Error_Handler();
	}
	/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
	clocks dividers */
	RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
	RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
	RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
	RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
	RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
	RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
	if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
	Error_Handler();
	}
	/* STM32F405x/407x/415x/417x Revision Z devices: prefetch is supported */
	if (HAL_GetREVID() == 0x1001) {
	/* Enable the Flash prefetch */
	__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
	}
	/* Ensure CCM RAM clock is enabled */
	__HAL_RCC_CCMDATARAMEN_CLK_ENABLE();
	}

[hamkoroke]

@fpistm Damn, I was looking to the wrong file the whole time. Thank you!