Modern, low-cost 10/100 Ethernet for the Macintosh SE and SE/30.
It's an unfortunate reality of retrocomputing that, as time goes on, original hardware only ever becomes more scarce, and usually more expensive.
While PDS ethernet cards are certainly not scarce yet, the collector appeal of Compact Macs means that cards are in high demand, with consequent high prices. As of this writing (October 2023), the going eBay rate for them seems to be of the order of $US 150-200, which is a bit steep for those of us who remember finding them in electronics-recycler dollar bins.
While other projects have aimed to clone these original cards, such an approach comes with a downside - the ethernet controller chips used in them have been out of production for many years, and the controllers and (even more so) their supporting components, are difficult to find.
While cloned cards trade off parts sourcing difficutly (and cost) for the significant advantage of being able to use existing drivers, this project takes the opposite approach: design an all-new card using a modern, readily-available ethernet controller, and write a new driver for it. How hard can it be? 1
Both the SEthernet and SEthernet/30 use the Microchip ENC624J600 all-in-one embedded ethernet controller. It's cheap, readily available, has a straightforward software interface without any glaring misfeatures (I'm looking at you, RTL8019AS), and amongst its multitude of configurable host-bus modes, it has one that matches the 68k processor bus nicely.
Since the Macintosh SE lacks any real infrastructure for expansion beyond
"here's a connector with the CPU bus on it," the SEthernet board is a very dumb
device. It simply maps the ENC624J600 into a vacant chunk of memory at 0x80 0000-0x80 ffff and connects it to an interrupt line. Hardware detection,
interrupt vector interception, and device configuration are all left to the
driver to implement.
The Macintosh SE/30 is a more civilised machine, and the SEthernet/30 provides a declaration ROM and multiple addressing options (configurable by jumper) to take full advantage of the Slot Manager and coexist with multiple PDS cards. Potentially, the driver could even be built into the declaration ROM, allowing for a truly plug-and-play solution. To facilitate driver updates, the declaration ROM is a flash chip, with logic to allow for in-system programming.
Very early days yet! Pardon my dust as I get this repo organised, more thorough writeups are hopefully forthcoming.
Rev0 boards have been ordered for the SE and SE/30, and the driver and glue logic are theoretically complete but untested and almost certainly broken in many fun and exciting ways.
The plan is, once the boards arrive, to bring up the SE board first, given that its glue logic is simpler. Once that's functional, I'll move on to the SE/30.
A subsequent revision will likely eliminate the awful through-hole PLCC sockets for directly-soldered surface-mount chips. This should make for much better routing and potentially free up board real estate for a PDS pass through slot in the SE/30 card.
While I would like to produce a small production run of these once the design has stabilised, that is likely a ways off at this point.
Schematics: SEthernet - SEthernet/30 - Breakout Board
Glue Logic: SEthernet - SEthernet/30
Schematics, board layout and BOM: KiCad 7
Programmable Logic: WinCUPL
(see pld/README.md for notes on WinCUPL)
Declaration ROM, driver and software: Retro68, CMake and Python 3
The combined SPISEL//INT pin on the ENC624J600 is pulled up instead of down.
This causes the ENC624J600 to be configured into SPI mode rather than parallel
mode, which is not much use to us.
Card does not function.
Break the track between the SPISEL pullup resistor (R5 on SEthernet, R2 on
SEthernet/30) and 3.3V. Connect the resistor to ground instead.
This issue has been resolved in the latest schematics for Revision 1.
Card operation is erratic.
Insert wait states on read accesses
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Carefully cut the traces connecting U4 pin 4 to ground on both sides of the board (a small countersink bit works well for this).
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Program a GAL16V8/ATF16V8 with the equations in
pld/se30/se30-bodge.pldand 'dead bug' it to a convenient place on the circuit board, connected as follows:
| Pin # | Destination |
|---|---|
| 1 | U1, pin 33 (CLKOUT) or J1, pin c38 (C16M/CPUCLK) (see note below) |
| 2 | U3, pin 12 (!ROM_CS) |
| 3 | U3, pin 13 (EN_CS) |
| 10, 11 | Ground |
| 12 | U4, pin 4 (WAIT) |
| 20 | +5V |
Connect a 0.1uF capacitor across pins 10 and 20.
It is preferable to use the ENC624J600's software-configurable CLKOUT pin as a
clock source, but the clock signal available on pin c38 of the PDS connector
(16MHz C16M on the SE/30 and IIsi, 20MHz CPUCLK on the IIfx) can be used as
a more easily-soldered alternative.
The default CLKOUT frequency of 4MHz (COCON=1011) gives ample timing margin, 25MHz (COCON=0010) gives
an optimal wait-state delay of 80 nanoseconds.
Revision 1 glue logic will be implemented on single CPLD with configurable wait-state generation built in.
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Designing Cards and Drivers for the Macintosh Family (3rd Edition)
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Glenn Anderson's ethernet driver page - contains C source for a DP8390-based card.
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Mac Driver Museum: Network Drivers - good material for reverse-engineering. In particular, the Dayna ethernet drivers contain debug symbols, which are quite handy for our purposes.
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Rob Braun's declaration ROM page has useful information about declaration ROMs and how they work.
Footnotes
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[Arrested Development narrator voice]: It was, in fact, quite hard ↩