Pinned Repositories
asynchronousDigitalNeuralCircuits
attempt for making neurons and synapse for making a SNN in verilog using asynchronous digital logic
nand-gate
NASSCOM--VSD-SOC-design
NASSCOM -VSD SOC design
NASSCOM-VLSI-PLANNING
td2d
ooga booga
tendo14.github.io
verilog-projects
Projects made in Verilog for learning
tendo14's Repositories
tendo14/asynchronousDigitalNeuralCircuits
attempt for making neurons and synapse for making a SNN in verilog using asynchronous digital logic
tendo14/nand-gate
tendo14/NASSCOM--VSD-SOC-design
NASSCOM -VSD SOC design
tendo14/NASSCOM-VLSI-PLANNING
tendo14/td2d
ooga booga
tendo14/tendo14.github.io
tendo14/verilog-projects
Projects made in Verilog for learning