VHDL-codes
Various VHDL codes from course "Digital VLSI Systems" 2020
In Lab2 we have initially separated combinational from sequential implementations. In "Combinational" folder you can find the implementations of combinational Half Adder (HA), Full Adder (FA), Ripple Carry Adder (RCA) and BCD-4bit-Adder circuits. Each evaluation has its own testbench. In "Sequential" folder there is a FA sequential and on top of that we implement a RCA and a 4-bit multiplier with the pipeline technique.
In Lab3 we implement in Task1 an 8-tap FIR filter using a Multiply-Accumulate Circuit (MAC) along with Rom and Ram circuits. In Task2 we evaluate a pipelined 8-tap FIR filter and in Task3 we implement a parallel pipelined 8-tap Filter with 2 inputs.
**All implementations have been tested in Vivado 2014.2 Suite