Pinned Repositories
a2i
caravel_OpenTDC
Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
cocotb
Coroutine Co-simulation Test Bench
docker
Scripts to build and use docker images including GHDL
ghdl_debian
Workplace for GHDL Debian package
gtkwave
GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.
mhdlsim
OpenTDC
Time to Digital Converter (TDC)
OSVVM
Open Source VHDL Verification Methodology (OSVVM) Repository
vunit
VUnit is a unit testing framework for VHDL/SystemVerilog
tgingold's Repositories
tgingold/OpenTDC
Time to Digital Converter (TDC)
tgingold/caravel_OpenTDC
Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
tgingold/a2i
tgingold/mhdlsim
tgingold/OSVVM
Open Source VHDL Verification Methodology (OSVVM) Repository
tgingold/vunit
VUnit is a unit testing framework for VHDL/SystemVerilog
tgingold/cocotb
Coroutine Co-simulation Test Bench
tgingold/docker
Scripts to build and use docker images including GHDL
tgingold/ghdl_debian
Workplace for GHDL Debian package
tgingold/gtkwave
GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard Verilog VCD/EVCD files and allows their viewing.
tgingold/microwatt
A tiny Open POWER ISA softcore written in VHDL 2008
tgingold/miniradius
tgingold/open_mpw_precheck
tgingold/open_pdks
PDK installer for open-source EDA tools and toolchains. Distributed with a setup for the Google/SkyWater 130nm process.
tgingold/openlane
OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
tgingold/OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow
tgingold/OpenSTA
OpenSTA engine