/fpga_partial_reconfiguration

Quartus II Cyclone V Partial Reconfiguration

Primary LanguageVHDL

FPGA Partial Reconfiguration

  • Projekt am Lehrstuhl für Rechnerarchitektur,University of Freiburg IMTEK
  • Jakob Klein, Markus Weiß, Johannes Kern
  • Quartus II Version 14.1/(15.0)
  • Altera Cyclone V FPGA (5SCEMA5F31C6N)

PR_Test

Partial reconfiguration of LED Flash Pattern by Internal Host. Extended Version