This is intended to be nand2tetris (http://www.nand2tetris.org/) on an FPGA. It is for people who have already gone through the nand2tetris projects using their hdl language & tools and want to try to get it working on an FPGA (De0-nano in my case). This code is verilog, so wont help in finding your own solutions to the nand2tetris course.
I'm totally new to FPGAs so it could take a while for there to be anything meaning full here...