- NVIDIA, NVCell: Standard Cell Layout in Advanced Technology Nodes with Reinforcement Learning Link to Paper
- Mirhoseini, Anna et al. Google, A graph placement methodology for fast chip design Link to Paper
- Yibo Lin, David Pan et al. UT Austin, DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement Link to Paper
- Sachin Sapatnekar et al. UMinnesota, ALIGN: A System for Automating Analog Layout Link to github