Pinned Repositories
allwinner_SiPs_kicad_lib
KiCad schematic and footprint library containing some of the most popular Allwinner SiPs like F1C100s, F1C200s, V3s, D1s and T113-S3
esp32c3_devboard
A development board integrating the ESP32-C3-MINI-1 module, designed in KiCad
hal_stm32
hwpe-ctrl
IPs for control-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
hwpe-stream
IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
hwpe-vfpu
nrf52_motor_controller
Motor controler development board integrating the nRF52832 MCU and DRV8876 motor controller
riscv
A simple RISC-V core implementing RV32I ISA
zephyr
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
zephyr
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
tmilkovic51's Repositories
tmilkovic51/allwinner_SiPs_kicad_lib
KiCad schematic and footprint library containing some of the most popular Allwinner SiPs like F1C100s, F1C200s, V3s, D1s and T113-S3
tmilkovic51/esp32c3_devboard
A development board integrating the ESP32-C3-MINI-1 module, designed in KiCad
tmilkovic51/hwpe-vfpu
tmilkovic51/riscv
A simple RISC-V core implementing RV32I ISA
tmilkovic51/zephyr
Primary Git Repository for the Zephyr Project. Zephyr is a new generation, scalable, optimized, secure RTOS for multiple hardware architectures.
tmilkovic51/hal_stm32
tmilkovic51/hwpe-ctrl
IPs for control-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
tmilkovic51/hwpe-stream
IPs for data-plane integration of Hardware Processing Engines (HWPEs) within a PULP system
tmilkovic51/nrf52_motor_controller
Motor controler development board integrating the nRF52832 MCU and DRV8876 motor controller