Pinned Repositories
dafny
Dafny is a verification-aware programming language
CMPEN454-Project-1
CMPEN545-Project-2
CPU
Designed a 32-bit 5 cycle pipelined CPU that can process and execute MIPS assembly instructions. The 5 cycles are: Instruction Fetch, Instruction Decode, Execute, Memory and, Write-Back
dafny
Dafny is a verification-aware programming language
mdadm-Linear-Device
An implementation of the Linear Device functionality in mdadm for JBOD with caching and networking.
Restoring-Divider
Designed and built a 16-bit restoring divider using Verilog and the resorting division algorithm.
tobiaj10's Repositories
tobiaj10/CPU
Designed a 32-bit 5 cycle pipelined CPU that can process and execute MIPS assembly instructions. The 5 cycles are: Instruction Fetch, Instruction Decode, Execute, Memory and, Write-Back
tobiaj10/dafny
Dafny is a verification-aware programming language
tobiaj10/mdadm-Linear-Device
An implementation of the Linear Device functionality in mdadm for JBOD with caching and networking.
tobiaj10/Restoring-Divider
Designed and built a 16-bit restoring divider using Verilog and the resorting division algorithm.