4-bit-combinational-adder
There are 2 repositories under 4-bit-combinational-adder topic.
Vedant-02/Verilog-HDL-Lab-Experiments
Verilog, standardized as IEEE 1364, is a hardware description language used to model electronic systems. This repository consists of Verilog HDL lab experiments conducted in course EEL2020 Digitial Design at IIT Jodhpur
joeymaillette04/VHDL
VHDL implementations of half-adders, full-adders, and a 4-bit adder for digital circuit design